Summer School

FDL Summer School 2026

Rome, Italy  •  September 8-11, 2026
Registration Conference Program
Schedule

Pre-conference Track

September 8-11, 2026 in Rome, ahead of the main FDL conference.

Speakers
Daniele Passaretti

Daniele Passaretti

Wolfgang Ecker

Wolfgang Ecker

Sebastian Reiter

Sebastian Reiter

Hokeun Kim

Hokeun Kim

Enrico Fraccaroli

Enrico Fraccaroli

Frederic Petrot

Frederic Petrot

Summer School

The FDL 2026 Summer School features six invited sessions spanning modeling abstractions, hardware construction languages, system engineering, and deterministic cyber-physical design. The program combines research talks with tutorial-style and hands-on sessions for attendees who want both conceptual depth and practical exposure.

Coverage

Topics range from RTL abstraction and hardware DSLs to SysML v2, Lingua Franca, and manufacturing-system simulation.

Format

The lineup includes invited talks, hands-on tutorials, and mixed talk-plus-practical sessions.

Registration

Summer School participation is part of FDL 2026. See the registration page for attendance details.

Hands-on note: the Lingua Franca tutorial asks participants to use a laptop running Linux, macOS, or Windows Subsystem for Linux, or another environment capable of running a virtual machine with Lingua Franca preinstalled.

Session Lineup

Abstracts & Speakers

Talk Daniele Passaretti

Beyond RTL: Hardware DSLs for Higher Abstractions in Digital Design and the RISC-V Ecosystem

Abstract

As hardware systems continue to grow in complexity, the languages used to describe them must evolve accordingly. Raising the level of abstraction in hardware design is essential to improve productivity, reuse, and design quality. This talk introduces hardware design languages from traditional HDLs to newer DSL-based approaches.

It presents the role of HDLs and DSLs in hardware development, highlighting the conceptual difference between software programming in C and hardware description, and examines the usability challenges of conventional RTL-centric design based on Verilog and SystemVerilog. High-Level Synthesis is discussed as an important step toward higher abstraction, while also showing why algorithmic descriptions alone are not sufficient for all hardware design tasks.

The session then introduces hardware DSLs such as Bluespec, Chisel, SpinalHDL, and Clash, focusing on the ideas that motivated their emergence and the abstractions they provide for hardware construction. It closes by exploring their relevance in the RISC-V ecosystem, where configurable architectures, reusable generators, and open design methodologies are increasingly important.

Talk Wolfgang Ecker

On Languages, Models, and Modelled Items

Abstract

This talk covers guiding principles of models and argues that abstraction is their most important feature. Because abstraction removes details, models are necessarily imperfect in some circumstances, echoing the observation that all models are wrong, but some are useful.

The session discusses several digital design abstraction methods, including lumped, value-discrete, and time-discrete models. It relates these abstractions to pre-clustered elements such as transistors, gates, registers, and transfer functions.

It further compares abstraction levels, connects them to current IP-based design, and shows how other disciplines, such as synchronous analog design or asynchronous digital design, fit into the broader abstraction scheme.

Talk Sebastian Reiter

Let's Scratch the Surface of the SysML v2 Meta Model

Abstract

This session explores SysML v2 from a meta-model perspective. It first contrasts the UML-based profile of SysML v1 with the KerML-based foundation of SysML v2.

After introducing both graphical and textual notations, the talk provides practical examples of the textual syntax together with the underlying grammar rules.

It concludes by examining extensibility and modularity mechanisms, showing how domain-specific adaptations can be defined with libraries and specializations without compromising core semantics.

Hands-on Tutorial Hokeun Kim

Modeling and Programming Time-Sensitive Systems Using Lingua Franca Coordination Language

Abstract

This hands-on tutorial introduces the Lingua Franca coordination language for modeling and programming time-sensitive systems with deterministic concurrency. Its primary goal is to give participants an engaging programming experience that helps them design domain-specific applications and systems with determinism and repeatability.

The tutorial includes a brief introduction to Lingua Franca, a live demo of building programs with specified timed behavior, and interactive programming exercises based on template code. It explores design alternatives for time-sensitive systems using the reactor model of computation, along with different coordination modes for federated and distributed Lingua Franca programs.

Participants will experience the full toolchain from code generation and compilation to distributed execution, reason about deterministic ordering mechanisms for timestamped events, and study trade-offs between consistency and availability in distributed concurrent settings.

Hands-on Tutorial Enrico Fraccaroli

GLACIER: An Open Framework for Modeling, Simulating, and Validating Modern Manufacturing Systems

Abstract

This hands-on tutorial introduces the GLACIER project, an open-source framework for the design, simulation, and validation of modern manufacturing systems. It starts from the challenges posed by increasingly complex cyber-physical production environments, including the integration of heterogeneous machines, software services, and communication infrastructures in service-oriented manufacturing architectures.

The session presents GLACIER as a framework for building open and extensible virtual testbeds in which advanced manufacturing software can be developed and evaluated before deployment. Particular attention is given to Frost, the GLACIER simulation platform built on Lingua Franca, which supports deterministic execution and unified modeling of machines, clients, data models, and communication behaviors.

Through guided practical activities, participants will explore how manufacturing components can be represented, connected, and executed in simulation, and how these virtual setups support early software validation, digital twin development, and machine-in-the-loop experimentation.

Talk + Hands-on Frederic Petrot

Hardware Construction Languages: Register Transfer Level on Steroids

Abstract

This talk and hands-on session revisits the transition from schematic-based digital design to textual hardware description languages, and the subsequent search for higher abstractions as circuit complexity increased.

It explains why, despite powerful standard tools and efficient circuit generation from textual descriptions, designers continued to need higher-level approaches that preserved full control over the produced hardware. Many of these efforts started as code-generation techniques built on software languages before evolving into more formalized hardware construction language ecosystems.

The session focuses on the specific nature of hardware construction languages and presents Chisel as a representative example of this community and design style.