| 08:00
| Registration |
|
| 08:30
| Opening Remarks |
Special Session: How do you RISC-V? |
Session 3: Compilation and Optimization |
| 09:00 |
Session 1: RISC-V Simulation, Verification, and
Optimization |
| 09:30 |
| 10:00 |
WiP Session |
| 10:30 |
Coffee Break |
Coffee Break |
Coffee Break - Posters |
| 11:00 |
Tutorial 1: Get the Most out of Your Waveforms - From
Non-functional Analysis to Functional Debug via Programs on Waveforms |
Tutorial 2: Formal specification language CAT for weak
memory models and bounded model checking with Dartagnan |
| 11:30 |
Session 4: Designing, Modeling, and Analyzing
Instructions and Hardware |
| 12:00 |
Keynote 1: Analog meets digital: how SystemC AMS can help
in the design of gate drivers |
Keynote 2: Design for Quantum Computing:
New Paradigms, new methods, new tools? |
| 12:30 |
| 13:00 |
Lunch |
Lunch |
Lunch |
| 13:30 |
| 14:00 |
Session 2: Security and Machine Learning on the Edge
|
Panel Session: The Impact of AI to the Future of
Design
and specification Languages |
Closing Remarks & Best Paper Award |
| 14:30 |
| 15:00 |
Moving to social event |
| 15:30 |
Coffee Break |
|
| 16:00 |
Project Dissemination |
Social event |
| 16:30 |
| 17:00 |
Ph.D Forum |
| 17:30 |
| 18:00 |
| 18:30 |
Welcome Reception |
| 19:00 |
Moving to dinner |
| 19:30 |
Dinner |
| 20:00 |
| 20:30 |
|
| 21:00 |